1. Field of the Invention
The present invention relates to a compound semiconductor device, more specifically, a semiconductor device comprising a plurality of field effect transistors (FET's) arranged in any direction or different directions, e.g., perpendicular to each other, in and on a compound semiconductor substrate.
2. Description of the Related Art
One of the more prominent developments in recent years has been silicon semiconductor devices. These silicon devices, however, have limits as to their operating speed and so research has begun on compound semiconductor devices to take their place. Compound semiconductors such as gallium arsenide (GaAs) feature remarkably larger mobility of carriers compared with silicon and thus offer increased operating speed. Transistors for which compound semiconductors are used include mainly FET's, particularly, Schottky barrier or metal-semiconductor FET's (MESFET's), since fabrication thereof is simple. Efforts are directed to make more practical integrated circuit (IC) devices utilizing the features of compound semiconductors.
A MESFET includes source and drain regions in a semiconductor substrate, in this case, a compound semiconductor substrate, for example, a GaAs substrate, a channel region in the substrate between the source and drain regions, and a gate electrode of a metal on the channel region, the metal of the gate electrode making Schottky contact with the semiconductor of the channel region.
IC devices may be composed of MESFET's, as mentioned above, and miniaturized to increase speed and integration. However, if the gate length of the FET's is made shorter for miniaturization, the deviations from the desired values of the characteristics of the FET's, such as the gate threshold voltage (Vth), and transconductance g.sub.m or K-value, i.e., a voltage-independent factor of the transconductance [K=.epsilon..mu.W.sub.g /2aL.sub.g, where a is a thickness of a channel layer, .epsilon. a permittivity of a channel layer, .mu. a mobility of carriers, W.sub.g a gate width, and L.sub.g a gate length]become larger and the characteristics of the FET's are changed in different manners depending on the crystallographic axis directions along which the gates are arranged. Conventional compound semiconductor devices such as GaAs devices generally use the (100) plane as the surface of the substrate. The gate threshold voltage of a MESFET having a gate along the [011]axis on the (100) plane changes greatly in the minus direction when the gate length is reduced below 2 .mu.m, while that of a MESFET having a gate along the [011] axis on the (100) plane changes slightly in the plus direction. Thus, IC devices with MESFET's whose gates are arranged in two such directions cannot provide a desired circuit operation if the gate lengths of the MESFET's deviate from the design values due to variations in the fabrication process. Therefore, conventional IC devices comprising MESFET's are fabricated by arranging gates of the MESFET's in only one direction. When attempting to arrange the output lines of the MESFET's in two or more different directions, such as in an X- and Y-address decoder of a memory circuit, both the design and fabrication process become complicated and miniaturization and densification of the IC device become difficult.
Turning back to the changes in characteristics, such as the gate threshold voltage of an FET, from desired values when the gate length is made shorter, i.e., the so-called "short channel" effect, it is important to note the flow of electrons from highly doped source and drain regions into a channel region and the effect of piezoelectric polarization in a semiconductor substrate. Deviations in characteristics of an FET by piezoelectric polarization are caused by an insulating layer, a gate electrode, and the like formed over a compound semiconductor substrate, which induce stress on the compound semiconductor substrate, changing the distribution of carriers in the channel region formed in the compound semiconductor substrate. As a result, the depth of a depletion layer of the channel region and thus the gate threshold voltage are changed. The direction of the change of the gate threshold voltage, plus or minus, depends on the polarity of the piezoelectric polarization determined by the stress direction and crystallographic axis direction. [See, for example, P. M. Asbeck et al.; IEEE transactions on Electron Devices, Vol. ED-31, No. 10, Oct. 1984, pp. 1377-1380] The K-value also varies with a change of the depth of the depletion layer of the channel region.